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19-1260; Rev 0; 10/97
+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package
_______________General Description
The MAX551/MAX552 are 12-bit, current-output, 4-quadrant multiplying digital-to-analog converters (DACs). These devices are capable of providing unipolar or bipolar outputs when operating from either a single +5V (MAX551) or +3V (MAX552) power supply. An internal power-on-reset circuit clears all DAC registers on power-up, setting the DAC output voltage to 0V. The SPITM/QSPITM and MicrowireTM-compatible 3-wire serial interface saves board space and reduces power dissipation compared with parallel-interface devices. The MAX551/MAX552 feature double-buffered interface logic with a 12-bit input register and a 12-bit DAC register. Data in the DAC register sets the DAC output voltage. Data is loaded into the input register via the serial interface. The LOAD input transfers data from the input register to the DAC register, updating the DAC output voltage. The MAX551/MAX552 are available in an 8-pin DIP package or a space-saving 10-pin MAX package. The MAX package provides an asynchronous clear (CLR) input that clears all DAC registers when pulled to GND, setting the output voltage to 0V.
____________________________Features
o Single-Supply Operation: +4.5V to +5.25V (MAX551) +2.7V to +3.6V (MAX552) o 12.5MHz 3-Wire Serial Interface o SPI/QSPI and Microwire Compatible o Power-On Reset Clears DAC Output to Zero o Asynchronous Clear Input Clears DAC Output to Zero o Voltage Mode or Bipolar Mode Operation with a Single Power Supply o Schmitt-Trigger Digital Inputs for Direct Optocoupler Interface o 0.4A Supply Current o 10-Pin MAX Package
MAX551/MAX552
______________Ordering Information
PART MAX551ACPA MAX551BCPA MAX551ACUB MAX551BCUB MAX551AEPA MAX551BEPA MAX551AEUB MAX551BEUB TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C -40C to +85C PINPACKAGE 8 Plastic DIP 8 Plastic DIP 10 MAX 10 MAX 8 Plastic DIP 8 Plastic DIP 10 MAX 10 MAX LINEARITY (LSB) 1/2 1 1/2 1 1/2 1 1/2 1
________________________Applications
Automatic Calibration Gain Adjustment Transducer Drivers Process-Control I/O Boards Digitally Controlled Filters Motion-Controlled Systems P-Controlled Systems Programmable Amplifiers/Attenuators
Ordering Information continued at end of data sheet.
________________Functional Diagram
REF RFB 12-BIT D/A CONVERTER CLR* LOAD RFB OUT AGND* VDD 12-BIT DAC REGISTER POWER-ON RESET GND
_________________Pin Configurations
TOP VIEW
OUT 1 GND 2 VDD 3 LOAD 4 8 RFB 7 REF OUT 1 AGND 2 GND 3 6 SCLK VDD 4 5 DIN LOAD 5 10 RFB 9 REF
MAX551 MAX552
MAX551 MAX552
8 CLR 7 SCLK 6 DIN
MAX551 MAX552
12-BIT SHIFT REGISTER *MAX PACKAGE ONLY DIN
SCLK
DIP
MAX
SPI and QSPI are trademarks of Motorola Inc. Microwire is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.
+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package MAX551/MAX552
ABSOLUTE MAXIMUM RATINGS
VDD to GND..............................................................................6V REF, RFB to GND.................................................................12V Digital Inputs (SCLK, DIN, LOAD, CLR) to GND .....................................................................-0.3V to 6V OUT to GND ...............................................-0.3V to (VDD + 0.3V) AGND to GND ............................................-0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70C) Plastic DIP (derate 9.09mW/C above +70C) .............727mW MAX (derate 5.60mW/C above +70C) .....................444mW Operating Temperature Ranges MAX55_ _C_ _......................................................0C to +70C MAX55_ _E_ _ ...................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS--MAX551
(VDD = +4.5V to +5.25V, VREF = 5V, OUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1) PARAMETER STATIC PERFORMANCE Resolution Integral Nonlinearity Differential Nonlinearity Gain Error Gain Tempco (Gain/Temp) Power-Supply Rejection PSR N INL DNL Guaranteed monotonic over temperature Using internal feedback resistor (RFB) MAX551A MAX551B MAX551A MAX551B MAX551A MAX551B 0.2 12 1/2 1 1/2 1 1 2 1 2 Bits LSB LSB LSB ppm/C ppm/% SYMBOL CONDITIONS MIN TYP MAX UNITS
Using internal feedback resistor (RFB) (Note 2) VDD = +5%, -10%
DYNAMIC PERFORMANCE (Note 3) TA = +25C, to 1/2LSB, OUT load is 100||13pF, DAC register alternately loaded with 1s and 0s VREF = 0V, OUT load is 100||13pF, DAC register alternately loaded with 1s and 0s VREF = 5Vp-p at 10kHz, DAC register loaded with all 0s THD VREF = 6VRMS at 1kHz, DAC register loaded with all 1s 10Hz to 100kHz, measured between RFB and OUT
Current Settling Time
tS
0.08
1
s
Digital-to-Analog Glitch
0.65
20
nV-s
AC Feedthrough at OUT
0.3
1
mVp-p
Total Harmonic Distortion
-85
dB
Output Noise-Voltage Density
13
15
nV/Hz
2
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+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package
ELECTRICAL CHARACTERISTICS--MAX551 (continued)
(VDD = +4.5V to +5.25V, VREF = 5V, OUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1) PARAMETER REFERENCE INPUT Input Resistance Input Resistance Tempco Reference -3dB Bandwidth ANALOG OUTPUT OUT Leakage Current DAC register loaded with all 0s COUT TA = +25C TA = TMIN to TMAX 14 20 0.15 5 25 20 30 nA BW VOUT = 0.31Vp-p, RL = 50, code = full-scale RREF Measured between REF and OUT 7 11 6.5 725 15 k ppm/C kHz SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX551/MAX552
OUT Capacitance DIGITAL INPUTS Input High Voltage Input Low Voltage Input Hysteresis
Code = zero scale (Note 2) Code = full scale (Note 2)
pF
VIH VIL HYST LOAD, CLR, DIN, and SCLK, VDD = 5V CLR SCLK, LOAD, DIN V CLR = VDD V CLR = 0V Inputs at 0V or VDD
2.4 0.8 156 1 18 100 1 8
V V mV
Input Leakage Current
IIN
A
Input Capacitance SWITCHING CHARACTERISTICS SCLK Pulse Width High SCLK Pulse Width Low DIN Data to SCLK Setup DIN Data to SCLK Hold LOAD Pulse Width LSB SCLK to LOAD LOAD High to SCLK CLR Pulse Width POWER SUPPLY Supply Voltage Supply Current
CIN
Inputs at 0V or VDD (Note 2)
pF
tCH tCL tDS tDH tLD tSL tLC tCLR
25 25 15 15 20 0 15 20
ns ns ns ns ns ns ns ns
VDD IDD All digital inputs at VIL or VIH, CLR = VDD All digital inputs at 0V or VDD, CLR = VDD
4.50 0.5 0.4
5.25 1.5 5
V mA A
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3
+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package MAX551/MAX552
ELECTRICAL CHARACTERISTICS --MAX552
(VDD = +2.7V to +3.6V, VREF = 2.5V, OUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1) PARAMETER STATIC PERFORMANCE Resolution Integral Nonlinearity Differential Nonlinearity Gain Error Gain Tempco (Gain/Temp) Power-Supply Rejection PSR N INL DNL Guaranteed monotonic over temperature Using internal feedback resistor (RFB) MAX552A MAX552B MAX552A MAX552B MAX552A MAX552B 0.3 12 1/2 1 1/2 1 1 2 1 1 Bits LSB LSB LSB ppm/C ppm/% SYMBOL CONDITIONS MIN TYP MAX UNITS
Using internal feedback resistor (RFB) (Note 2) VDD = +20%, -10%
DYNAMIC PERFORMANCE (Note 3) Current Settling Time tS TA = +25C, to 1/2LSB, OUT load is 100||13pF, DAC register alternately loaded with 1s and 0s VREF = 0V, OUT load is 100||13pF, DAC register alternately loaded with 1s and 0s VREF = 3Vp-p at 10kHz, DAC register loaded with all 0s THD VREF = 6VRMS at 1kHz, DAC register loaded with all 1s 10Hz to 100kHz, measured between RFB and OUT 0.12 1 s
Digital-to-Analog Glitch AC Feedthrough at OUT Total Harmonic Distortion Output Noise-Voltage Density REFERENCE INPUT Input Resistance Input Resistance Tempco Reference -3dB Bandwidth ANALOG OUTPUT OUT Leakage Current BW RREF
0.6 0.2 -85 13
20 0.6
nV-s mVp-p dB
15
nV/Hz
Measured between REF and OUT VOUT = 0.31Vp-p, RL = 50, code = full-scale
7
11 7.5 725
15
k ppm/C kHz
DAC register loaded with all 0s
TA = +25C TA = TMIN to TMAX
0.13
5 nA 25
OUT Capacitance
COUT
Code = zero code (Note 2) Code = full scale (Note 2)
14 20
20 30
pF
4
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+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package
ELECTRICAL CHARACTERISTICS --MAX552 (continued)
(VDD = +2.7V to +3.6V, VREF = 2.5V, VOUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1) PARAMETER DIGITAL INPUTS Input High Voltage Input Low Voltage Input Hysteresis VIH VIL HYST LOAD, CLR, DIN, and SCLK, VDD = 3V CLR SCLK, LOAD, DIN Input Capacitance SWITCHING CHARACTERISTICS SCLK Pulse Width High SCLK Pulse Width Low DIN Data to SCLK Setup DIN Data to SCLK Hold LOAD Pulse Width LSB SCLK to LOAD LOAD High to SCLK CLR Pulse Width POWER SUPPLY Supply Voltage Supply Current VDD IDD All digital inputs at VIL or VIH, CLR = VDD All digital inputs at 0V or VDD, CLR = VDD 2.7 0.1 0.07 3.6 0.5 5 V mA A tCH tCL tDS tDH tLD tSL tLC tCLR 40 40 15 15 30 0 15 30 ns ns ns ns ns ns ns ns CIN V CLR = VDD V CLR = 0V Inputs at 0V or VDD 12 135 1 75 1 8 pF A 2.1 0.6 V V mV SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX551/MAX552
Input Leakage Current
IIN
Inputs at 0V or VDD (Note 2)
Note 1: AGND and CLR are for MAX only. Note 2: Guaranteed by design. Not subject to production testing. Note 3: Parametric limits are provided for design guidance, and are not production tested.
_______________________________________________________________________________________
5
+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package MAX551/MAX552
__________________________________________Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
MAX551 TOTAL HARMONIC DISTORTION vs. FREQUENCY
MAX551/552 toc3
SUPPLY CURRENT vs. LOGIC INPUT VOLTAGE
MAX551/552 toc4
MAX551 INL vs. REFERENCE VOLTAGE
0.4 0.3 0.2 VDD = 5.25V
MAX551/MAX552 TOC1A
0
1.0 VIN AT DIN, SCLK, & LOAD CLR = VDD
0.5
-20 THD + N (dB)
SUPPLY CURRENT (mA)
OUTPUT AMPLIFIER = MAX4166 1st 5 HARMONICS VREF = 0.42Vp-p, RL = 50 INPUT CODE = ALL 1s
0.8
VDD = 5.0V 0.4 VDD = 3.3V VDD = 2.7V
INL (LSB) 5
-40
0.6
0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5
-60
-80
0.2
-100 0.001 0.01 0.1 1 FREQUENCY (MHz)
0 0 1 2 3 4 LOGIC INPUT VOLTAGE, VIN (V)
4.7
4.8
4.9
5.0
5.1
5.2
5.3
REFERENCE VOLTAGE (V)
MAX551 DNL vs. REFERENCE VOLTAGE
MAX551/MAX552 TOC2A
MAX552 INL vs. REFERENCE VOLTAGE
MAX551/MAX5452 TOC4A
MAX552 DNL vs. REFERENCE VOLTAGE
0.4 0.3 0.2 DNL (LSB) 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 VDD = 3.6V
MAX551/MAX552 TOC3A
0.5 0.4 0.3 0.2 DNL (LSB) 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 4.7 4.8 4.9 5.0 5.1 5.2 VDD = 5.25V
0.5 0.4 0.3 0.2 INL (LSB) 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 VDD = 3.6V
0.5
5.3
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.2
2.3
2.4
2.5
2.6
2.7
2.8
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
MULTIPLYING FREQUENCY RESPONSE
2 1 0 GAIN (dB) -1 -2 -3 -4 -5 -6 -7 0.01 0.1 1 10 FREQUENCY (MHz) -100 0.01 MAX551 OR MAX552 VREF = 0.31Vp-p, RL = 50 INPUT CODE = ALL 1s OUTPUT AMPLIFIER = MAX4166
MAX551/552 toc2
REFERENCE AC FEEDTHROUGH vs. FREQUENCY
MAX551 OR MAX552 VREF = 0.31Vp-p, RL = 50 INPUT CODE = ALL 0s OUTPUT AMPLIFIER = MAX4166
MAX4551/552 TOC1
3
-50 REFERENCE AC FEEDTHROUGH (dB)
-60
-70
-80
-90
0.1 FREQUENCY (MHz)
1
6
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+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package
______________________________________________________________Pin Description
PIN NAME DIP 1 -- 2 3 4 5 6 -- 7 8 MAX 1 2 3 4 5 6 7 8 9 10 OUT AGND GND VDD LOAD DIN SCLK CLR REF RFB DAC Current Output Analog Ground Digital Ground. Also Analog Ground for DIP package. Supply Voltage Active-Low Load DAC Input. Driving this asynchronous input low transfers the contents of the input register to the DAC register. Serial-Data Input Serial-Clock Input. The serial input data is clocked in on SCLK's rising edge. Clear DAC Input. Clears the DAC register. Tie to VDD or float if not used. Reference Input Feedback Resistor FUNCTION
MAX551/MAX552
R VREF 2R 2R
R
R
R
2R
2R
2R
2R
RFB* RFB
OUT AGND
D11 (MSB) RFB* = R
D10
D9
D1
DO (LSB)
Figure 1. MAX551/MAX552 Simplified Circuit
_______________________________________________________________________________________
7
+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package MAX551/MAX552
DIN BIT 11 MSB tDS 1 tCH SCLK LOAD SERIAL DATA INTO INPUT REGISTER tSL tLD LOAD tLC tCL tDH 2 11 BIT 10 BIT 1 BIT 0 LSB
CLR tCLR
Figure 2. Write-Cycle Timing Diagram
Detailed Description
The MAX551/MAX552 digital-to-analog converter (DAC) circuits consist of a laser-trimmed, thin-film R-2R resistor array with NMOS current switches (Figure 1). Binary-weighted currents are switched to either OUT or AGND, depending on the status of each input data bit. Although the currents at OUT and AGND depend on the digital input code, the sum of the two output currents is always equal to the input current at REF. The output current (IOUT) can be converted into a voltage by adding an external output amplifier (Figure 3). The REF input accepts a wide range of signals, including fixed and time-varying voltage or current inputs. If a current source is used at the reference input, use a low-tempco, external feedback resistor in place of the
internal feedback resistor (RFB) to minimize gain variation with temperature. The internal feedback resistor (RFB) is compensated with an NMOS switch that matches the NMOS switches used in the R-2R array, resulting in excellent supply rejection and gain-temperature coefficient. The OUT pin output capacitance (C OUT ) is code dependent. COUT is typically 14pF at 000hex and 20pF at FFFhex.
Serial Interface
The MAX551/MAX552 serial interface is compatible with the SPI/QSPI and Microwire serial-interface standards. These devices accept serial clocks up to 12.5MHz (50% duty cycle). If the SCLK input is not
Table 1. Unipolar Binary-Code Table for Circuit of Figure 3
MSB 1111 DIGITAL INPUT LSB 1111 1111 ANALOG OUTPUT
4095 - VREF 4096 2048 VREF -VREF = - 2 4096 1 - VREF 4096
+5V (+3V) VREF R1 100 REF VDD R2 50 DIN RFB C1 15pF 2 6 3 VOUT
1000
0000
0000
SCLK
MAX551 OUT MAX552
0000
0000
0001
LOAD
GND AGND
0000
0000
0000
0
( ) ARE FOR MAX552
Figure 3. Unipolar Operation
8 _______________________________________________________________________________________
+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package MAX551/MAX552
R4 20k R2 50 R5 20k
+5V (+3V)
VDD VREF R1 100 SCLK REF
RFB OUT
C1 33pF R3 10k
MAX551 MAX552
LOAD DIN
AGND GND VOUT
( ) ARE FOR MAX552
Figure 4. Bipolar Operation
Table 2. Offset Binary-Code Table for Circuit of Figure 4
MSB 1111 DIGITAL INPUT LSB 1111 1111 ANALOG OUTPUT
2047 + VREF 2048 1 + VREF 2048
Unipolar Operation
Figure 3 shows the MAX551/MAX552's basic application. This circuit is used for unipolar operation or 2quadrant multiplication. The code table for this mode is given in Table 1. Note that the output's polarity is the opposite of the reference voltage polarity. In many applications the gain accuracy is sufficient and gain adjustment is not necessary. In these cases, resistors R1 and R2 in Figure 3 can be omitted. If the gain is trimmed and the DAC is operated over a wide temperature range, use low-tempco (<300ppm/C) resistors for R1 and R2. Capacitor C1 provides phase compensation and reduces overshoot and ringing when fast amplifiers are used at the DAC's output.
1000
0000
0001
1000
0000
0000
0
1 - VREF 2048 2048 - VREF 2048
0111
1111
1111
Bipolar Operation
Figure 4 shows the MAX551/MAX552 operating in bipolar (or 4-quadrant multiplying) mode. Matched resistors R3, R4, and R5 must be of the same material (preferably metal film or wire-wound) for good temperaturetracking characteristics (<15ppm/C) and should match to 0.01% for 12-bit performance. The output code is offset binary, as listed in Table 2. To adjust the circuit, load the DAC with a code of 1000 0000 0000 and trim R1 for a 0V output. With R1 and R2 omitted, an alternative zero trim is needed to adjust the ratio of R3 and R4 for 0V out. Trim full scale by loading the DAC with all 0s or 1s and adjusting the VREF amplitude or varying R5 until the desired positive or negative output is obtained. In applications where gain trim is not required, omit resistors R1 and R2. If gain trim is desired and the DAC is operated over a wide tempera-
0000
0000
0000
symmetrical, then the clock signal used must meet the t CH and t CL requirements given in the Electrical Characteristics. Figure 2 shows the MAX551/MAX552 timing diagram. The most significant bit (MSB) is always loaded first on SCLK's rising edge. When all data is shifted into the input register, the DAC register is loaded by driving the LOAD signal low. The DAC register is transparent when LOAD is low and latched when LOAD is high. The MAX551/MAX552 digital inputs are compatible with CMOS logic levels. The MAX551's inputs are also compatible with TTL logic.
_______________________________________________________________________________________
9
+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package MAX551/MAX552
ture range, then low-tempco (<300ppm/C) resistors should be used.
__________Applications Information
Output Amplifier
For best linearity, terminate OUT and GND at exactly 0V. In most applications, OUT is connected to an inverting op amp's summing junction. The amplifier's input offset voltage can degrade the DAC's linearity by causing OUT to be terminated to a nonzero voltage. The resulting error is: Error Voltage = VOS (1 + RFB / RO)
REFERENCE VOLTAGE OUT
+5V
VDD REF VOUT
MAX551
GND DIN SCLK LOAD
Figure 5. Single-Supply, Voltage Mode Operation
where V OS = is the op amp's offset and R O is the DAC's output resistance, which is code dependent. The maximum error voltage (Ro = RFB) is 2VOS; the minimum error voltage (RO= ) is VOS. To minimize this error, use a low-offset amplifier such as the MAX4166 (unipolar output) or the MAX427 (bipolar output). Otherwise, the amplifier offset must be trimmed to zero. A good guide rule is that VOS should be no more than 1/10LSB. The output amplifier's input bias current (IB) can also limit performance, since IB x RFB generates an offset error. Choose an op amp with an I B much less than (e.g., one-tenth) the DAC's 1LSB output current (typically 111nA when VREF = 5V, and 55.5nA when VREF = 2.5V). Offset and linearity can also be impaired if the output amplifier's noninverting input is grounded through a bias-current compensation resistor. This resistor adds to the offset at this pin and thus should not be used. For best performance, connect the noninverting input directly to ground. In static or DC applications, the output amplifier's characteristics are not critical. In higher speed applications in which either the reference input is an AC signal or the DAC output must quickly settle to a new programmed value, the output op amp's AC parameters must be considered. A compensation capacitor, C1, may be required when the DAC is used with a high-speed output amplifier. The purpose of the capacitor is to cancel the pole formed by the DAC output capacitance, COUT, and the
internal feedback resistor, RFB. Its value depends on the type of op amp used but typically ranges from 14pF to 30pF. Too small a value causes output ringing, while excess capacitance overdamps the output. C1's size can be minimized and the output voltage settling time improved by keeping the circuit-board trace short and stray capacitance at OUT as low as possible.
Single-Supply Operation
Reference Voltage The MAX551/MAX552 are true 4-quadrant DACs, making them ideal for multiplying applications. The reference input accepts both AC and DC signals within a voltage range of 6V. The R-2R ladder is implemented with thin-film resistors, enabling the use of unipolar or bipolar reference voltages with only a single power supply for the DAC. The voltage at the VREF input sets the DAC's full-scale output voltage.
If the reference is too noisy, it should be bypassed to GND (AGND on the 10-pin MAX package) with a 0.1F ceramic capacitor located as close to the REF pin as possible.
Voltage Mode (MAX551) The MAX551 can be conveniently used in voltage mode, single-supply operation with OUT biased at any voltage between GND and V DD . OUT must not be allowed to go 0.3V lower than GND or 0.3V higher than VDD. Otherwise, internal diodes will turn on, causing a high current flow that could damage the device.
10
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+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package MAX551/MAX552
+5V (+3V) +5V (+3V) C1 VDD REF DGND RFB OUT AC REFERENCE INPUT 10k 10k
VDD
OUT
MAX551 MAX552
MAX4167
AGND
VOUT
MAX4166
REF GND
MAX551 MAX552
+1.43V TO +12.6V ( ) ARE FOR MAX552
MAX4167
OUT 106M
Figure 7. Single-Supply AC Reference Input Circuit
MAX6160
ADJ
( ) ARE FOR MAX552
scale). With 2.45V applied to REF, the output can be programmed from 1.23V (zero code) to 0.01V (full scale). The MAX4166 op amp that drives AGND maintains the 1.23V bias as AGND's impedance changes with the DAC's digital code, from high impedance (zero code) to 7k minimum (full scale).
Figure 6. Single-Supply, Current Mode Operation
Using an AC Reference
In applications where reference voltage has AC signal components, the MAX551/MAX552 have multiplying capability within the reference input range of 6V. If the DAC and the output amplifier are operated with a single supply voltage, then an AC reference input can be offset with the circuit shown in Figure 7 to prevent the DAC output voltage from exceeding the output amplifier's negative output rail. The reference input's typical -3dB bandwidth is greater than 700kHz, as shown in the Typical Operating Characteristics graphs.
Figure 5 shows the MAX551 connected as a voltage output DAC. In this mode of operation, the OUT pin is connected to the reference-voltage source, and the GND pin is connected to the PCB ground plane. The DAC output now appears at the REF pin, which has a constant resistance equal to the reference input resistance (11k typ). This output should be buffered with an op amp when a lower output impedance is required. The RFB pin is not used in this mode. The reference input (OUT) impedance is code dependent, and the circuit's response time depends on the reference source's behavior with changing load conditions. An advantage of voltage mode operation is that a negative reference is not required for a positive output. Note that the reference input (OUT) must always be positive and is limited to no more than 2V when VDD is 5V. The unipolar and bipolar circuits in Figures 3 and 4 can be converted to voltage mode.
Offsetting AGND
The MAX551/MAX552 provide separate AGND and GND inputs in the MAX package. With this package, AGND can be biased above GND to provide an arbitrary nonzero output voltage for a "0" input code (Figure 8).
Layout, Grounding, and Bypassing
Bypass VDD with a 0.1F capacitor, located as close to VDD and GND as possible. The ground pins (AGND and GND) should be connected in a star configuration to the highest quality ground available, which should be located as close to the MAX551/MAX552 as possible. Since OUT and the output amplifier's noninverting input are sensitive to offset voltage, nodes that are to be
11
Current Mode Figure 6 shows the MAX551/MAX552 in a current output configuration in which the output amplifier is powered from a single supply, and AGND is biased to 1.23V. With 0V applied to the REF input, the output can be programmed from 1.23V (zero code) to 2.46V (full
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+3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin MAX Package MAX551/MAX552
tice, connect active inputs to VDD or GND through highvalue resistors (1M) to prevent static charge accumulation if the pins are left floating, such as when a circuit card is left unconnected. The CLR input on the MAX device has an internal pullup resistor with a typical value of 125k. If the CLR input is not used, tie it to VDD to minimize supply current.
VIN REF AGND GND VDD OUT
MAX551 MAX552
VBIAS
Figure 8. AGND Bias Current
_Ordering Information (continued)
PART MAX552ACPA MAX552BCPA MAX552ACUB MAX552BCUB MAX552AEPA MAX552BEPA MAX552AEUB MAX552BEUB TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C -40C to +85C PINPACKAGE 8 Plastic DIP 8 Plastic DIP 10 MAX 10 MAX 8 Plastic DIP 8 Plastic DIP 10 MAX 10 MAX LINEARITY (LSB) 1/2 1 1/2 1 1/2 1 1/2 1
grounded should be connected directly to a singlepoint ground through a separate, low-resistance (less than 0.2) connection. The current at OUT and AGND varies with input code, creating a code-dependent error if these terminals are connected to ground (or virtual ground) through a resistive path. Parasitic coupling of the signal from REF to OUT is an error source in dynamic applications. This coupling is normally a function of board layout and pin-to-pin package capacitance. Minimize digital feedthrough with guard traces between digital inputs, REF, and OUT pins. The MAX551/MAX552 have high-impedance digital inputs. To minimize noise pick-up, tie them to either VDD or GND when they are not in use. As a good prac-
___________________Chip Information
TRANSISTOR COUNT: 887 SUBSTRATE CONNECTED TO VDD
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ___________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1997 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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